User Interfaces Ic Compiler Computer Science Essay Example
IC Compiler is the software package from Synopsys for Physical Design of ASIC. It provides the necessary tools to complete the back end design of the very deep submicron designs. The inputs to the IC Compiler are: a gate-level netlist which can be from DC Compiler or third-party tools, a detailed floorplan which can be from previous Design Planning through IC Compiler or other third-party tools, timing constraints and other constraints, physical and timing libraries provided by manufacturer, and foundry-process data. IC Compiler generates a GDSII-format file as output ready for tape out of the chip. In addition, it is possible to export a Design Exchange Format (DEF) file of placed netlist data ready for a third-party router. IC Compiler uses a binary Synopsys Milkyway database, which can be used by other Synopsys tools based on Milkyway. [16]
User Interfaces
IC Compiler can be
...used either with Shell interface (icc_shell) or with Graphical user interface (GUI). Shell interface is the command-line interface, which is used for batch mode, scripts, typing commands, and push-button type of operations. Graphical user interface (GUI) is an advanced graphical analysis and physical editing tool. Certain tasks, such as very accurately displaying the design and providing visual analysis tools, can only performed from the GUI. Also tool command language (Tcl), which is used in many applications in the EDA industry, is available to IC Compiler. Using Tcl, you can write reusable procedures and scripts.
The IC Compiler design flow is an easy-to-use, single-pass flow that provides convergent timing closure. Figure 4.1 shows the basic IC Compiler design flow, which is centered around three core commands that perform placement and optimization (place_opt), clock tree synthesis
and optimization (clock_opt), and routing and postroute optimization (route_opt). [16]
For most designs, if the place_opt, clock_opt, and route_opt steps are followed, IC Compiler will provide optimal results. You can use IC Compiler to efficiently perform chip-level design planning, placement, clock tree synthesis and routing on designs with moderate timing and congestion challenges.
To further improve the quality of results for your design you can use additional commands and switches for placement, clock tree synthesis, and routing steps that IC Compiler provides.
IC Compiler design flow involves execution of following steps:
- Set up and prepare the libraries and the design data.
- Perform design planning and power planning.
- Perform placement and optimization.
- Perform clock tree synthesis and optimization.
- Perform routing and postroute optimization.
- Perform chip finishing and design for manufacturing tasks.
- Save the design.
Save your design in the Milkyway format. This format is the internal database format used by IC Compiler to store all the logical and physical information about a design. [16]
How to Invoke the IC Compiler
- Log in to the UNIX environment with the user id and password.
- start IC Compiler from the UNIX promt:
- Start the GUI.
This window can display schematics and logical browsers, among other things, once a design is loaded.
Preparing the Design
IC Compiler uses a Milkyway design library to store design and its associated library information. This section describes how to set up the libraries, create a Milkyway design library, read your design, and save the design in Milkyway format.
These steps are explained in the following sections:
Setting Up the Libraries
IC Compiler requires both logic libraries and physical libraries. The following sections describe how to set up and validate these libraries.
IC Compiler uses logic libraries
to provide timing and functionality information for all standard cells. In addition, logic libraries can provide timing information for hard macros, such as RAMs.
IC Compiler uses variables to define the logic library settings. In each session, you must define the values for the following variables (either interactively, in the .synopsys_dc.setup file, or by restoring the values saved in the Milkyway design library) so that IC Compiler can access the libraries:
IC Compiler uses Milkyway reference libraries and technology (.tf) files to provide physical library information. The Milkyway reference libraries contain physical information about the standard cells and macro cells in your technology library. In addition, these reference libraries define the placement unit tile. The technology files provide information such as the names and characteristics (physical and electrical) for each metal layer, which are technology-specific.
The physical library information is stored in the Milkyway design library. For each cell, the Milkyway design library contains several views of the cell, which are used for different physical design tasks.
If you have not already created a Milkyway library for your design (by using another tool that uses Milkyway), you need to create one by using the IC Compiler tool. If you already have a Milkyway design library, you must open it before working on your design.
This section describes how to perform the following tasks
Setting Up the Power and Ground Nets
IC Compiler uses variables to define names for the power and ground nets. In each session, you must define the values for the following variables (either interactively or in the .synopsys_dc.setup file) so that IC Compiler can identify the power and ground nets:
By default, IC Compiler VSS as the ground net name.
If you are using a different name,
you must specify the name by setting the mw_logic0_net variable.
By default, IC Compiler uses VDD as the power net name. If you are using a different name, you must specify the name by setting the mw_logic1_net variable.
IC Compiler can read designs in either Milkyway or ASCII (Verilog, DEF, and SDC files) format.
Annotating the Physical Data
IC Compiler provides several methods of annotating physical data on the design:
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