Study And Analysis Of Computer Organization Computer Science Essay Example
Study And Analysis Of Computer Organization Computer Science Essay Example

Study And Analysis Of Computer Organization Computer Science Essay Example

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  • Pages: 3 (684 words)
  • Published: August 3, 2018
  • Type: Article
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Computer organisation, or computer architecture, focuses on studying various elements such as the central processing unit (CPU), memory, registers, and other components. The CPU is responsible for performing data processing operations in a computer.

A central processing unit (CPU) is composed of three main components, which are the following:

Arithmetic Logic Unit (ALU)

Control Unit

The content of the "

Register Set

" remains unchanged.

ALU

The Arithmetic Logic Unit (ALU) is a crucial component of a computer processor that carries out arithmetic and logical operations on data. These operations include addition, subtraction, division, multiplication, as well as comparisons involving letters, numbers, or special characters. The ALU receives data from various sources such as the control unit, registers, memory, and Input/Output (I/O) register to process the information and generate an output.

Control Unit

The control u

...

nit is responsible for determining the execution timing of instructions and the required sequence of operations for each instruction.

Register Set

The register set is a small data storage area utilized by the processor. It comprises the General-Purpose Register (GPR), status register, and other program registers. Data stored in a register can be accessed more swiftly compared to data stored in memory.

The instruction code is 2.2.

The instruction code contains bits that inform a computer about the task it needs to perform. It is composed of two parts: the operation code (opcode) and the operand. The opcode instructs the computer on which operation to execute, while the operand indicates where to locate or identify the data (refer to Figure 2.1).

The control unit of a computer reads and retrieves the opcode from memory. This is done through the fetch operation, which involves retrieving the opcode bits from memory. Once retrieved, the contro

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unit initiates a sequence of operations using internal computer registers.

2.3 Addressing Modes - Addressing modes are being discussed here.

The addressing mode refers to how data in memory is accessed. Memory is composed of words, each with its own address and data. The various methods used to specify data addresses are referred to as addressing modes.

Computer utilizes different addressing modes that can handle one or both of these provisions. These provisions are as follows:

To enhance programming flexibility, the programmer is granted access to several functionalities such as memory pointers, data indexing, loop control counters, and program relocation.

The instruction has been modified to reduce the size of the address field.

The modified instruction format now includes the mode field, which is used to locate the operands needed for the operation (Refer to Figure 2.2).

Instructions are classified according to the number of operands they have, as shown below:

Three-Address Instructions

Two-Address Instructions

One-Address Instructions

Zero-Address Instructions

2.3.1 Three-Address Instructions

The three-address instruction is defined as 'operation add-1, add-2, add-3' where add-1, add-2, and add-3 can denote a register or a memory location.

The given example is "ADD R1, R2, R3", enclosed in a paragraph HTML tag.

The value in register R1 is the sum of the values in registers R2 and R3.

The ADD A, B, C instruction exemplifies the utilization of memory locations. It performs the addition operation by adding the content of memory location B to the content of memory location C and then stores the resulting value in memory location A.

Two-Address Instructions, 2.3.2

The format of a two-address instruction is as follows: 'operation add-1, add-2'. Both add-1 and add-2 can represent either a register or a memory location.The example is "

ADD R1, R2

".

The instruction

below demonstrates the addition of register R2's content to register R1's content, resulting in the storage of the sum in register R1. This operation replaces the original content of register R1, while keeping register R2 unchanged. It is similar to a three-address instruction written as ADD R1, R1, R2.

The ADD A, B instruction is a two-address instruction that adds the content of memory location B to memory location A. The original content of memory location A is then replaced.

2.3.3 One-Address Instructions

The instruction form 'operation add-1' specifies a one-address instruction that refers to an accumulator register.

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