Product Development Analysis

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Marketers define a product as “anything that an organization can offer to a market for attention, acquisition, use or consumption that might satisfy a want or a need” (Kotler and Armstrong, 1991; pg. 253). The core product offered represents the essential benefit or service experienced, while the actual product represents the product/service as packaged for consumption. The augmented product represents the “intangible component or service that a product provides” (Melnyk and Denzler, 1996).

Figure 1 shows these three levels of a product.Intel’s core service lies in its chip design and manufacturing process technology. This is “packaged” in various forms to create products: client desktop and laptop platforms incorporating its microprocessors, network infrastructure products incorporating its specialised networking chips, etc. “A comprehensive image of product development comes from an understanding of customers’ normal interactions with an organization that offers them a bundle of goods and services” (Melnyk and Denzler, 1996; pg 507).Figure 2 represents this interaction as a 3-ring, interlocking customer fulfilment process. The Production/Delivery area captures the customer’s order and receipt of the firm’s product.

In the Product Design space, the firm designs the actual and augmented products into the product bundle experienced by the customer. In a make-to-stock situation, the customer’s contact with the system occurs at the left of the diagram, while the firm’s response occurs in the intersection of the Delivery and Design spaces (Melnyk and Denzler 1996).In a firm such as Intel which competes on a lead-time basis, the overall “speed” of customer interactions occurs by optimizing either the product design process, or the product delivery process to individually produce their outputs faster and coherently. Intel’s product design process is largely driven by its technology leadership.

To this end, Intel has steadily increased it’s spend on research and development, from $4. 8 billion in 2004 to $5. 9 billion in 2006, approximately 16% of net revenue (Intel, 2006b; pg. 49).

Intel’s R&D spending allows it to design multiple generations of new microprocessors concurrently. This (concurrent design) requires a “comprehensive process for completing the steps in process design through continuing involvement of cross-functional teams” (Melnyk and Denzler, 1996; pg 520). To achieve, this, Intel uses “split teams” of designers; teams are coupled on specific chip designs, with parts of teams working directly with fabrication engineers to apply appropriate fabrication techniques and process technologies, and solve volume-production issues.Competitive advantage results in large part from the way work gets done during the process of development. Especially important is the process by which engineering (both design and manufacturing process) and marketing combine technical detail (e. g.

dimensions, operating parameters, component details, etc. ) into a coherent “package” that envelopes customer requirements and expectations (Wheelwright and Clark, 1992). Intel’s “split-teams” model allows greater focus on the individual engineering and marketing aspects of chips right from the product development stage.To summarize, Intel’s product design process is optimized by its use of concurrent design and “split-teams” of design and fabrication engineers, so that multiple generations of microprocessors are being designed and supported simultaneously.

This also allows it to stay ahead of its competitors in other complementary business areas such as its Internet “building block” business. 1. 0 Product Delivery Processes and Technologies Silicon chip manufacture involves basically three main process areas: fabrication, assembly, and test. Assembly is not usually a constraining factor, and can be ramped up rapidly to suit capacity requirements.Similarly, testing can be ramped up in the short term.

Fabrication (the front end of the process) is usually the bottleneck in times of tight capacity. Since fabrication is the constraining resource, it also becomes the key variable for assigning costs to products (Cogan and Burgelman, 1989). Delivering the regular progress dictated by Moore’s Law (see Appendix 1) in the face of increasingly complex process technologies requires steady improvements in the pace of yield learning and volume manufacturing capability. Figure 3 illustrates this trend for Intel’s process technologies.Figure 3: Intel Defect Density Trends (Source: Natarajan, et al, 2002) The requirement for regular process has caused Intel to focus on a set of core technologies shared by many Intel products.

Intel utilizes combinations of silicon technologies, package technologies, test technologies, and board technologies to bring products to market (Natarajan, et al, 2002). ? Silicon Technology — the fabrication process used to create integrated circuits (IC) on silicon wafers by adding and patterning the layers that form transistors and interconnects.? Package Technology — the assembly process used to enclose silicon ICs in an electronic package with connections accessible to the user. ? Test Technology — the test process, from wafer sort through package-level test and burn-in, designed to ensure that shipped devices meet quality and data sheet requirements.

? Board Technology — the design and fabrication of printed circuit boards using multiple components. 2. 0 Planning and SchedulingA key manufacturing strategy within Intel is to optimize the manufacturing process for a given chip, and then roll out that process to Intel’s other fabrication plants (or “fabs”) in a process called “Copy Exactly! ” In addition, Intel closely integrates product design with product manufacture, to optimize its time-to-market advantage (Stanford, 1999). Intel uses a level-production strategy, so that the production rate from a fab is equal to the average demand rate for the chip range(s) manufactured in that fab.

This strategy accumulates inventory during slack demand and distributes goods from inventory during peak demand periods (Melnyk and Denzler, 1996), as discussed below. 2. 1 Capacity Planning Intel continues to invest heavily in state-of-the-art manufacturing facilities, spending over $4 billion on capital additions annually. While most chip companies market prototype designs to potential customers before committing to manufacturing, and many others outsource manufacturing rather than build their own fabs, according to one analyst: “Only Intel builds [manufacturing] capacity before it creates demand.” In building this capacity, Intel takes great pains to standardize each facility as it expands its manufacturing base.

As processes for manufacture of particular chips become firmed, these are then transferred to other facilities. Each production facility is more or less dedicated to a particular process technology (e. g. logic devices, EPROM, etc. ), though some facilities manufacture more than one family. This also obviously increases Intel’s manufacturing capacity per individual product.

Intel’s capacity planning process is done at different levels of detail for different time horizons. Decisions for equipment purchase or re-use are made based on target capacity, with protective capacity to support demand variability. Production planning is done for multi-year horizons split across the virtual factory network. Here the resource requirement planning is reviewed, and adjustments are made to the production plan, labor, collaterals, and material.

Finally, production control is done for multi-week horizons (Ali, Campbell, Solomon, Walsh, and Wuerfel; 2005).

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