Operating Systems – Memory Management and Paging – Test 2
Program must be brought (from disk) into memory and placed within a process for it to be run.
large array of words/bytes each with own address.
Register access in 1 CPU clock cycle; Main memory many CPU clock cycles.
Protection of memory required to ensure correct operation.
SRAM and DRAM technology.
Typical access time for DRAM 70 ns.
An array of addressable cells.
Cell – a group of bits : In modern machines, a cell is a group of 8 bits (byte). Each cell in memory has a unique address.
n bit address – maximum number of addressable cells = 2n.
Memory Address Register (MAR).
Cannot modify information (easily), different kinds – PROM, EPROM, EEPROM.
Limit register – specifies the range/size.
Linker/linkage editor – program that takes one or more objects generated by a compiler and combines them into a single executable program.
Loader – program that loads the executable into actual memory.
Compiler binds symbolic to relocatable addresses.
Linker/loader binds these relocatable addresses to absolute memory addresses.
Load time – if address of process not known at compile time then compiler must produce relocatable code; final binding delayed until load time.
Execution time – If process can be moved during its execution from one memory segment to another, then binding must be delayed until run time (used by most OSs).
Logical and physical address space differ (especially in exec-time address binding scheme).
Logical addresses (0 to max); Physical (R+0 to R+max).
Better memory-space utilization; unused routine is never loaded.
Useful when large amounts of code are needed to handle infrequently occurring cases.
No special support from the OS is required; implemented through program design (modular, library routines).
A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution.
Backing store – fast disk large enough to accommodate copies of all memory images for all users.
Context-switch time in a swapping system is high.
Usually a process that is swapped out will be swapped back into the same (previous) memory space.
Execution-time binding allows the process to be moved to a different memory space as the physical addresses are computed only during execution.
System maintains a ready queue of ready-to-run processes which have memory images on disk or in memory.
Relocation registers used to protect user processes from each other, and from changing OS code/data.
Each process contained in a single contiguous section of memory.
Internal memory fragmentation problem : Wasted memory because allocated memory is larger than requested.
Initially all memory available, one large block/hole. As memory fills up, holes of various sizes develop.
OS keep track of holes and process memory requirements and decides which processes can be allocated memory. Adjacent holes are merged to form a bigger hole.
Cannot allocate a process (contiguous requirement) even though there is enough combined memory.
Best-fit (BF) – Allocate the smallest hole that is big enough; must search entire list, unless ordered by size; produces the smallest leftover hole.
Worst-fit (WF) – Allocate the largest hole; must also search entire list; Produces the largest leftover hole. May be more useful than smaller leftover hole from BF.
FF and BF are better than WF in terms of time and storage utilization; FF and BF are similar in terms of storage utilization, but FF is faster.
50-percent rule – given N allocated blocks, 0.5N blocks will be lost to fragmentation.
Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is unused memory internal to a partition, but not being used. Can only be done if relocation is dynamic; done at exec-time
Divide physical memory into fixed-sized blocks called frames (size is power of 2, usually between 512 – 8Kbytes).
Divide logical memory into blocks of same size called pages. When a process is executed, load its pages from storage into any available frames.
Set up a page table to translate logical to physical addresses.
Page number (p) – index into a page table which contains base address of each page in physical memory.
Page offset (d) – combined with base address to get physical memory address sent to the memory unit.
Logical address space = 2m ,page size = 2n.
Internal fragmentation remains – last frame may not be full.
Worst case a process needs n pages plus 1 byte; On average 0.5 page wasted per process; small page sizes are desirable – can reduce swapping.
To reduce size of page table – larger pages: Disk I/O is more efficient when larger data is transferred.
Translation (page table) is hidden by the OS, no way of addressing memory outside of the page table.
Changing page table requires only changing PTBR. Reduces context switch time.
Every access requires two memory accesses – one for the page table and one for the data/instruction (slow by a factor of 2!)
Parallely search Associative cache (fast, but very expensive).
Hit ratio – percentage of times that a page number is found in the associative registers; related to num. of associative registers.
Equation: 2M – M(PHETA) + E
PHETA = percent
E = time units
Additionally Valid/invalid bit used in each entry of page table indicating whether the associated page is in the process’ logical address space, and is thus a legal page.
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